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<h1 id="cmpt-295---unit---instruction-set-architecture">CMPT 295 - Unit - Instruction Set Architecture</h1>
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<p>I do not like computer jokes…not one bit!</p>
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<p>Lecture 24:</p>
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<ul>
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<li>MIPS</li>
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</ul>
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<h2 id="last-lecture">Last Lecture</h2>
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<ul>
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<li>Assembler (part of the compilation process):
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<ul>
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<li>Transforms assembly code (<code class="language-plaintext highlighter-rouge">movl %edi,%eax</code>) into machine code
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(<code class="language-plaintext highlighter-rouge">0xf889 -> 1111100010001001</code>)</li>
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</ul>
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</li>
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<li>Instruction Set Architecture (ISA) [Annotation: …is an abstract model of a computer …is an interface between software (and s/w developers) and hardware (hardware designers)
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A formal specification (or agreement) of:
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<ul>
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<li>Registers and memory model, set of instructions (assembly-machine) [Annotation: main memory]</li>
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<li>Conventions, model of computation [Annotation: data types, memory addressing modes]</li>
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<li>etc…</li>
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</ul>
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</li>
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<li>Design principles when creating instruction set (IS)
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<ol>
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<li>Each instruction must have an unambiguous encoding</li>
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<li>Functionally complete (Turing complete)</li>
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<li>Machine instruction format: 1) as few of them as possible 2) of the
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same length 3) fields that have the same purpose positioned in the
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same location in the format</li>
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</ol>
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</li>
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<li>Types of instruction sets: CISC and RISC</li>
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</ul>
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<p>[Annotation: A realization of an ISA is called an implementation. An ISA permits multiple implementations.]</p>
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<h2 id="todays-menu">Today’s Menu</h2>
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<ul>
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<li>Instruction Set Architecture (ISA)
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<ul>
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<li>Definition of ISA</li>
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</ul>
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</li>
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<li>Instruction Set design
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<ul>
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<li>Design guidelines</li>
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<li>(highlighted) Example of an instruction set: MIPS</li>
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<li>Create our own instruction sets</li>
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<li>ISA evaluation</li>
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</ul>
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</li>
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<li>Implementation of a microprocessor (CPU) based on an ISA
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<ul>
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<li>Execution of machine instructions (datapath)</li>
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<li>Intro to logic design + Combinational logic + Sequential logic circuit</li>
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<li>Sequential execution of machine instructions</li>
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<li>Pipelined execution of machine instructions + Hazards</li>
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</ul>
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</li>
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</ul>
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<h2 id="example-of-another-isa-mips">Example of another ISA: MIPS</h2>
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<p>[Annotation: MIPS = microprocessor without interlocked pipelined stages.]</p>
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<h2 id="example-of-an-isa-mips">Example of an ISA: MIPS</h2>
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<ul>
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<li>Registers and Memory model
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<ul>
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<li># of registers -> 32 registers (each register is 32 bit wide) See Figure on next Slide [Annotation: 1]</li>
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<li>Word size -> 32 bits [Annotation: 3]</li>
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<li>Memory size -> <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msup><mn>2</mn><mi>m</mi></msup><mo>×</mo><mi>n</mi><mo>=</mo><msup><mn>2</mn><mn>32</mn></msup><mo>×</mo><mn>8</mn><mtext> bits</mtext></mrow><annotation encoding="application/x-tex">2^{m} \times n = 2^{32} \times 8 \text{ bits}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.747722em;vertical-align:-0.08333em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.664392em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mathnormal mtight">m</span></span></span></span></span></span></span></span></span><span class="mspace" style="margin-right:0.2222222222222222em;"></span><span class="mbin">×</span><span class="mspace" style="margin-right:0.2222222222222222em;"></span></span><span class="base"><span class="strut" style="height:0.43056em;vertical-align:0em;"></span><span class="mord mathnormal">n</span><span class="mspace" style="margin-right:0.2777777777777778em;"></span><span class="mrel">=</span><span class="mspace" style="margin-right:0.2777777777777778em;"></span></span><span class="base"><span class="strut" style="height:0.897438em;vertical-align:-0.08333em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.8141079999999999em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mtight">32</span></span></span></span></span></span></span></span></span><span class="mspace" style="margin-right:0.2222222222222222em;"></span><span class="mbin">×</span><span class="mspace" style="margin-right:0.2222222222222222em;"></span></span><span class="base"><span class="strut" style="height:0.69444em;vertical-align:0em;"></span><span class="mord">8</span><span class="mord text"><span class="mord"> bits</span></span></span></span></span> [Annotation: 5]</li>
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<li>Byte-addressable memory
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so address resolution -> n = 8 bits [Annotation: 4]</li>
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<li>Size of memory address (# of bits) -> 32 bits; m = 32 [Annotation: 2]</li>
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</ul>
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</li>
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<li>So, there are <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msup><mn>2</mn><mn>32</mn></msup></mrow><annotation encoding="application/x-tex">2^{32}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8141079999999999em;vertical-align:0em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.8141079999999999em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mtight">32</span></span></span></span></span></span></span></span></span></span></span></span> distinct addressable memory “chunks”
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(or “locations”) and each of these addressable memory
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“chunks” (or “locations”) has 8 bits See Figure on next next Slide [Annotation: 6]</li>
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</ul>
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<h3 id="figure-a61-mips-registers-and-usage-conventions">FIGURE A.6.1 MIPS registers and usage conventions.</h3>
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<table>
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<thead>
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<tr>
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<th>Register name</th>
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<th>Number</th>
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<th>Usage</th>
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</tr>
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</thead>
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<tbody>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$zero</code></td>
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<td>0</td>
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<td>constant 0</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$at</code></td>
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<td>1</td>
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<td>reserved for assembler</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$v0</code></td>
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<td>2</td>
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<td>expression evaluation and results of a function</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$v1</code></td>
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<td>3</td>
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<td>expression evaluation and results of a function</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$a0</code></td>
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<td>4</td>
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<td>argument 1</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$a1</code></td>
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<td>5</td>
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<td>argument 2</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$a2</code></td>
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<td>6</td>
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<td>argument 3</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$a3</code></td>
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<td>7</td>
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<td>argument 4</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t0</code></td>
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<td>8</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t1</code></td>
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<td>9</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t2</code></td>
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<td>10</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t3</code></td>
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<td>11</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t5</code></td>
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<td>12</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t6</code></td>
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<td>13</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t7</code></td>
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<td>14</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s0</code></td>
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<td>15</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s1</code></td>
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<td>16</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s2</code></td>
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<td>17</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s3</code></td>
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<td>18</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s4</code></td>
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<td>19</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s5</code></td>
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<td>20</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s6</code></td>
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<td>21</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$s7</code></td>
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<td>22</td>
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<td>saved temporary (preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t8</code></td>
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<td>24</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$t9</code></td>
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<td>25</td>
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<td>temporary (not preserved across call)</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$k0</code></td>
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<td>26</td>
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<td>reserved for OS kernel</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$k1</code></td>
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<td>27</td>
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<td>reserved for OS kernel</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$gp</code></td>
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<td>28</td>
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<td>pointer to global area</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$sp</code></td>
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<td>29</td>
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<td>stack pointer</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$fp</code></td>
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<td>30</td>
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<td>frame pointer</td>
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</tr>
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<tr>
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<td><code class="language-plaintext highlighter-rouge">$ra</code></td>
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<td>31</td>
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<td>return address (used by function call)</td>
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</tr>
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</tbody>
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</table>
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<p>Source: Page A-24 in Patterson and Hennessy</p>
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<h2 id="mips-memory-model">MIPS Memory Model</h2>
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<h3 id="figure-213--the-mips-memory-allocation-for-program-and-data">FIGURE 2.13 – The MIPS memory allocation for program and data</h3>
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<p>These addresses are only a software convention,
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and not part of the MIPS architecture.
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The stack pointer is initialized to <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>7fff fffc</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{7fff fffc}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.84444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">7fff fffc</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span> and grows down toward the segment.<!--_-->
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At the other end, the program code (“text”) starts at <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>0040 0000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{0040 0000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">0040 0000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span>. <!--_-->
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The static data starts at <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 0000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 0000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 0000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span>. <!--_-->
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Dynamic data, allocated by <code class="language-plaintext highlighter-rouge">malloc</code> in C and by <code class="language-plaintext highlighter-rouge">new</code> in Java, is next.
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It grows up toward the stack and in an area called the heap.
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The global pointer: <code class="language-plaintext highlighter-rouge">$gp</code>, is set to an address to make it easy to access data.
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It is initialized to <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 8000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 8000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 8000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span><!--_-->
|
|
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so it can access from <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span> to <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 ffff</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 ffff}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.84444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 ffff</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span> using the positive and negative 16-bit offsets from <code class="language-plaintext highlighter-rouge">$gp</code>.
|
|
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The information is also found in Column 4 of the MIPS Reference Data Card at the front of the book.</p>
|
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<p>Source: Page 104 in Patterson and Hennessy</p>
|
|
|
|
|
|
<table>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td>Register/Address</td>
|
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|
<td>Label</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>(top) <code class="language-plaintext highlighter-rouge">$sp</code> -> <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>7fff ffff</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{7fff ffff}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.84444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">7fff ffff</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span></td>
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<td>Stack (arrow pointing down)</td>
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</tr>
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<tr>
|
|
|
<td> </td>
|
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<td>Dynamic data (arrow pointing up) [Annotation: heap]</td>
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|
</tr>
|
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<tr>
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<td>(between Static Data and Text) <code class="language-plaintext highlighter-rouge">$gp</code> -> <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 8000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 8000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 8000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span>, <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>1000 0000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{1000 0000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">1000 0000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span></td>
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<td>Static Data</td>
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</tr>
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<tr>
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<td>(bottom) <code class="language-plaintext highlighter-rouge">$pc</code> -> <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msub><mtext>0040 0000</mtext><mtext>hex</mtext></msub></mrow><annotation encoding="application/x-tex">\text{0040 0000}_{\text{hex}}</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.79444em;vertical-align:-0.15em;"></span><span class="mord"><span class="mord text"><span class="mord">0040 0000</span></span><span class="msupsub"><span class="vlist-t vlist-t2"><span class="vlist-r"><span class="vlist" style="height:0.33610799999999996em;"><span style="top:-2.5500000000000003em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord text mtight"><span class="mord mtight">hex</span></span></span></span></span></span><span class="vlist-s"></span></span><span class="vlist-r"><span class="vlist" style="height:0.15em;"><span></span></span></span></span></span></span></span></span></span></td>
|
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<td>Text</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>(bottom) 0</td>
|
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|
<td>Reserved</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
|
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|
<h2 id="example-of-an-isa-mips-1">Example of an ISA: MIPS</h2>
|
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|
|
|
<ul>
|
|
|
<li>Instruction set
|
|
|
<ul>
|
|
|
<li>MIPS assembly language notation
|
|
|
<ul>
|
|
|
<li><code class="language-plaintext highlighter-rouge">add a, b, c</code>, Meaning: a = b+c</li>
|
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|
</ul>
|
|
|
</li>
|
|
|
<li>3 operand assembly language
|
|
|
<ul>
|
|
|
<li>Requiring all instructions to have 3 operands would
|
|
|
keep the design of the microprocessor hardware
|
|
|
simple</li>
|
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|
<li>Hardware for a variable number of operands is
|
|
|
more complicated</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<h2 id="activity">Activity</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>
|
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|
<p>If we want to write an assembly program that sums
|
|
|
four variables b, c , d and e, how many MIPS add
|
|
|
instructions would we need?</p>
|
|
|
</li>
|
|
|
<li>
|
|
|
<p>Solution:</p>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<div class="language-plaintext highlighter-rouge"><div class="highlight"><pre class="highlight"><code>add a,b,c # a = b+c
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add a,a,d # a = b+c+d
|
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add a,a,e # a = b+c+d+e
|
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</code></pre></div></div>
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<p><span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><mo>∴</mo></mrow><annotation encoding="application/x-tex">\therefore</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.69224em;vertical-align:0em;"></span><span class="mrel amsrm">∴</span></span></span></span> make your comments as “self contained” as possible, to be self contained, the reader does not have to refer back to other commands to understand current comment!</p>
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<h2 id="example-of-an-isa-mips-2">Example of an ISA: MIPS</h2>
|
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|
|
|
<p>(Sub)set of instructions:</p>
|
|
|
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
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|
<th>MIPS assembly language instructions</th>
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|
<th>Semantic (i.e., Meaning)</th>
|
|
|
<th>Corresponding MIPS machine instructions</th>
|
|
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</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">lw $s1, 20($s2)</code> <a href="#A">A</a></td>
|
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|
<td><code class="language-plaintext highlighter-rouge">$s1 = M[$s2 + 20]</code></td>
|
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|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
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|
<td><code class="language-plaintext highlighter-rouge">sw $s1, 20($s2)</code> <a href="#A">A</a></td>
|
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|
<td><code class="language-plaintext highlighter-rouge">M[$s2 + 20] = $s1</code></td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">add $s1, $s2, $s3</code></td>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s1 = $s2 + $s3</code></td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">sub $s1, $s2, $s3</code></td>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s1 = $s2 - $s3</code></td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">beq $s1, $s2, 25</code></td>
|
|
|
<td><code class="language-plaintext highlighter-rouge">if ($s1 == $s2) go to PC + 4 + 100</code> [Annotation: PC+4 done as part of loop fetch-decode-execute]</td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">j 2500</code></td>
|
|
|
<td><code class="language-plaintext highlighter-rouge">go to 10000 (2500 * 4 bytes)</code></td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">jal 2500</code></td>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$ra = PC + 4; go to 10000</code></td>
|
|
|
<td>?</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
|
|
|
<ul>
|
|
|
<li><span id="A">Memory addressing modes -> Direct (absolute),
|
|
|
base + displacement and Indirect</span></li>
|
|
|
<li>Operand model -></li>
|
|
|
<li>Format/syntax of corresponding MIPS machine instructions?
|
|
|
<ul>
|
|
|
<li>Length of machine instruction -> 32 bits (4 bytes)</li>
|
|
|
<li>Size of opcode? Size of other fields? Order of operands?</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<p>Format/syntax of these bit patterns are all the question marks.</p>
|
|
|
|
|
|
<h2 id="a-closer-look-at-mips-add-instruction">A closer look at MIPS’ add instruction</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>MIPS assembly language instruction:
|
|
|
<ul>
|
|
|
<li>add <span id="As0">$s0</span>, <span id="Aal">$al</span>, <span id="At7">$t7</span></li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>Corresponding MIPS machine instruction:
|
|
|
<ul>
|
|
|
<li>0x00af8020</li>
|
|
|
<li>Binary: 0000 0000 1010 1111 1000 0000 0010 0000</li>
|
|
|
<li>
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
|
|
<th>Breakdown: Label</th>
|
|
|
<th>Binary</th>
|
|
|
<th>Meaning</th>
|
|
|
<th>Bits</th>
|
|
|
</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td>opcode</td>
|
|
|
<td>000000</td>
|
|
|
<td>operation of the instruction</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rs (<code class="language-plaintext highlighter-rouge">$al</code> in <code class="language-plaintext highlighter-rouge">add $s0,$al,$t7</code>)</td>
|
|
|
<td>00101</td>
|
|
|
<td>first register source operand</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rt (<code class="language-plaintext highlighter-rouge">$t7</code> in <code class="language-plaintext highlighter-rouge">add $s0,$al,$t7</code>)</td>
|
|
|
<td>01111</td>
|
|
|
<td>second register source operand</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rd (<code class="language-plaintext highlighter-rouge">$s0</code> in <code class="language-plaintext highlighter-rouge">add $s0,$al,$t7</code>)</td>
|
|
|
<td>10000</td>
|
|
|
<td>register destination operand (contains result of operation)</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>shamt</td>
|
|
|
<td>00000</td>
|
|
|
<td>shift amount</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>func</td>
|
|
|
<td>100000</td>
|
|
|
<td>function – often called function code, which indicates the specific variant of the operation in the <code class="language-plaintext highlighter-rouge">opcode</code> field</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<p>[Annotation: Why 5 bits for <code class="language-plaintext highlighter-rouge">rs</code>, <code class="language-plaintext highlighter-rouge">rt</code> and <code class="language-plaintext highlighter-rouge">rd</code>?
|
|
|
<span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><msup><mn>2</mn><mn>5</mn></msup><mo>=</mo><mn>32</mn></mrow><annotation encoding="application/x-tex">2^{5} =32</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.8141079999999999em;vertical-align:0em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.8141079999999999em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mtight">5</span></span></span></span></span></span></span></span></span><span class="mspace" style="margin-right:0.2777777777777778em;"></span><span class="mrel">=</span><span class="mspace" style="margin-right:0.2777777777777778em;"></span></span><span class="base"><span class="strut" style="height:0.64444em;vertical-align:0em;"></span><span class="mord">32</span></span></span></span> registers -> need 5 bits to uniquely identify 32 registers]</p>
|
|
|
|
|
|
<p>Total: 32 bits</p>
|
|
|
|
|
|
<h2 id="lets-examine-an-isa-mips-3-of-3">Let’s examine an ISA: MIPS (3 of 3)</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>Function call conventions
|
|
|
<ul>
|
|
|
<li>caller saved registers (4-15, 24, 25)</li>
|
|
|
<li>callee saved registers (16-23, 30, 31)</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
|
|
<th>Register name</th>
|
|
|
<th>Number</th>
|
|
|
<th>Usage</th>
|
|
|
</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$zero</code></td>
|
|
|
<td>0</td>
|
|
|
<td>constant 0</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$at</code></td>
|
|
|
<td>1</td>
|
|
|
<td>reserved for assembler</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$v0</code></td>
|
|
|
<td>2</td>
|
|
|
<td>expression evaluation and results of a function</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$v1</code></td>
|
|
|
<td>3</td>
|
|
|
<td>expression evaluation and results of a function</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$a0</code></td>
|
|
|
<td>4</td>
|
|
|
<td>argument 1</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$a1</code></td>
|
|
|
<td>5</td>
|
|
|
<td>argument 2</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$a2</code></td>
|
|
|
<td>6</td>
|
|
|
<td>argument 3</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$a3</code></td>
|
|
|
<td>7</td>
|
|
|
<td>argument 4</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t0</code></td>
|
|
|
<td>8</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t1</code></td>
|
|
|
<td>9</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t2</code></td>
|
|
|
<td>10</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t3</code></td>
|
|
|
<td>11</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t5</code></td>
|
|
|
<td>12</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t6</code></td>
|
|
|
<td>13</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t7</code></td>
|
|
|
<td>14</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s0</code></td>
|
|
|
<td>15</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s1</code></td>
|
|
|
<td>16</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s2</code></td>
|
|
|
<td>17</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s3</code></td>
|
|
|
<td>18</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s4</code></td>
|
|
|
<td>19</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s5</code></td>
|
|
|
<td>20</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s6</code></td>
|
|
|
<td>21</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$s7</code></td>
|
|
|
<td>22</td>
|
|
|
<td>saved temporary (preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t8</code></td>
|
|
|
<td>24</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$t9</code></td>
|
|
|
<td>25</td>
|
|
|
<td>temporary (not preserved across call)</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$k0</code></td>
|
|
|
<td>26</td>
|
|
|
<td>reserved for OS kernel</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$k1</code></td>
|
|
|
<td>27</td>
|
|
|
<td>reserved for OS kernel</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$gp</code></td>
|
|
|
<td>28</td>
|
|
|
<td>pointer to global area</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$sp</code></td>
|
|
|
<td>29</td>
|
|
|
<td>stack pointer</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$fp</code></td>
|
|
|
<td>30</td>
|
|
|
<td>frame pointer</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td><code class="language-plaintext highlighter-rouge">$ra</code></td>
|
|
|
<td>31</td>
|
|
|
<td>return address (used by function call)</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
|
|
|
<h2 id="mips---design-guidelines">MIPS - Design guidelines</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>opcode</li>
|
|
|
<li>rs</li>
|
|
|
<li>rt</li>
|
|
|
<li>rd</li>
|
|
|
<li>shamt</li>
|
|
|
<li>func</li>
|
|
|
</ul>
|
|
|
|
|
|
<p>3) In terms of machine instruction format:
|
|
|
1. Create as few of them as possible
|
|
|
2. Have them all of the same length and same format!
|
|
|
3. If we have in different machine instruction formats, then position the
|
|
|
fields that have the same purpose in the same location in the format</p>
|
|
|
<ul>
|
|
|
<li>Can all MIPS machine instructions have the same length and same
|
|
|
format?
|
|
|
<ul>
|
|
|
<li>For example: <code class="language-plaintext highlighter-rouge">lw $s1, 20($s2)</code></li>
|
|
|
<li>When designing its corresponding machine instruction …
|
|
|
<ul>
|
|
|
<li>Must specify source register using 5 bits -> OK!</li>
|
|
|
<li>Must specify destination register using 5 bits -> OK!</li>
|
|
|
<li>Must specify a constant using 5 bits -> Hum…
|
|
|
<ul>
|
|
|
<li>Value of constant limited to [0..25-1]</li>
|
|
|
<li>Often use to access array elements
|
|
|
so needs to be <span class="katex"><span class="katex-mathml"><math xmlns="http://www.w3.org/1998/Math/MathML"><semantics><mrow><mo>></mo><msup><mn>2</mn><mn>5</mn></msup><mo>=</mo><mn>32</mn></mrow><annotation encoding="application/x-tex">> 2^{5} = 32</annotation></semantics></math></span><span class="katex-html" aria-hidden="true"><span class="base"><span class="strut" style="height:0.5782em;vertical-align:-0.0391em;"></span><span class="mrel">></span><span class="mspace" style="margin-right:0.2777777777777778em;"></span></span><span class="base"><span class="strut" style="height:0.8141079999999999em;vertical-align:0em;"></span><span class="mord"><span class="mord">2</span><span class="msupsub"><span class="vlist-t"><span class="vlist-r"><span class="vlist" style="height:0.8141079999999999em;"><span style="top:-3.063em;margin-right:0.05em;"><span class="pstrut" style="height:2.7em;"></span><span class="sizing reset-size6 size3 mtight"><span class="mord mtight"><span class="mord mtight">5</span></span></span></span></span></span></span></span></span><span class="mspace" style="margin-right:0.2777777777777778em;"></span><span class="mrel">=</span><span class="mspace" style="margin-right:0.2777777777777778em;"></span></span><span class="base"><span class="strut" style="height:0.64444em;vertical-align:0em;"></span><span class="mord">32</span></span></span></span></li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<h2 id="mips-isa-designers-compromise">MIPS ISA designers compromise</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>Keep all machine instructions format the same length</li>
|
|
|
<li>Consequence -> different formats for different kinds of MIPS
|
|
|
instructions
|
|
|
<ul>
|
|
|
<li>R-format for register
|
|
|
<ul>
|
|
|
<li>
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
|
|
<th>Label</th>
|
|
|
<th>Size</th>
|
|
|
</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td>opcode</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rs</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rt</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>shamt</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>func</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>I-format for immediate
|
|
|
<ul>
|
|
|
<li>
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
|
|
<th>Label</th>
|
|
|
<th>Size</th>
|
|
|
</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td>opcode</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rs</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>rt</td>
|
|
|
<td>5 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>Address/immediate</td>
|
|
|
<td>16 bits</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>J-format for jump
|
|
|
<ul>
|
|
|
<li>
|
|
|
<table>
|
|
|
<thead>
|
|
|
<tr>
|
|
|
<th>Label</th>
|
|
|
<th>Size</th>
|
|
|
</tr>
|
|
|
</thead>
|
|
|
<tbody>
|
|
|
<tr>
|
|
|
<td>opcode</td>
|
|
|
<td>6 bits</td>
|
|
|
</tr>
|
|
|
<tr>
|
|
|
<td>Target address</td>
|
|
|
<td>26 bits</td>
|
|
|
</tr>
|
|
|
</tbody>
|
|
|
</table>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>opcode indicates the format of the instruction
|
|
|
<ul>
|
|
|
<li>This way, the hardware knows whether to treat the last half of the
|
|
|
instruction as 3 fields (R-format) or as 1 field (I-format)</li>
|
|
|
<li>Also, position of fields with same purpose are in the same location
|
|
|
in the 3 formats ☺</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<h2 id="summary">Summary</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>Types of instruction sets: CISC and RISC</li>
|
|
|
<li>Looked at an example of a RISC instruction set: MIPS
|
|
|
<ul>
|
|
|
<li>Registers and Memory model</li>
|
|
|
<li>(Sub)set of instructions (assembly + machine instructions)</li>
|
|
|
<li>Function call conventions</li>
|
|
|
<li>Model of computation</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>MIPS design principles
|
|
|
<ol>
|
|
|
<li>Unambiguous binary encoding of instruction</li>
|
|
|
<li>(highlighted) IS functionally complete (“Turing complete”)</li>
|
|
|
<li>Machine instruction format -> only 3 of same length but of different format!
|
|
|
* R-format for register
|
|
|
* I-format for immediate
|
|
|
* J-format for jump</li>
|
|
|
</ol>
|
|
|
</li>
|
|
|
<li>Also, position of fields with same purpose are in the same location in the 3
|
|
|
formats ☺</li>
|
|
|
</ul>
|
|
|
|
|
|
<h2 id="next-lecture">Next lecture</h2>
|
|
|
|
|
|
<ul>
|
|
|
<li>Instruction Set Architecture (ISA)
|
|
|
<ul>
|
|
|
<li>Definition of ISA</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>Instruction Set design
|
|
|
<ul>
|
|
|
<li>Design guidelines</li>
|
|
|
<li>Example of an instruction set: MIPS</li>
|
|
|
<li>(highlighted) Create our own instruction sets</li>
|
|
|
<li>(highlighted) ISA evaluation</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
<li>Implementation of a microprocessor (CPU) based on an ISA
|
|
|
<ul>
|
|
|
<li>Execution of machine instructions (datapath)</li>
|
|
|
<li>Intro to logic design + Combinational logic + Sequential logic circuit</li>
|
|
|
<li>Sequential execution of machine instructions</li>
|
|
|
<li>Pipelined execution of machine instructions + Hazards</li>
|
|
|
</ul>
|
|
|
</li>
|
|
|
</ul>
|
|
|
|
|
|
<footer>
|
|
|
</footer>
|
|
|
</div>
|
|
|
</main>
|
|
|
</body>
|
|
|
</html>
|
